Research Interests

I am interested in researching self-assembling and self-organizing systems which display complexity arising from simple components and local interactions. There are many examples in the natural world of both living and non-living systems in which large numbers of small, autonomous pieces form systems that are extremely complex without any centralized control and from simple sets of rules. By studying existing systems and designing novel ones, I hope to help illuminate fundamental properties of such systems which give rise to their complex behavior, including life. Additionally, the creation of complex artificial systems which self-assemble and self-organize could help to revolutionize many areas of technology.


Current Research

Nanoscale Self-Assembly
My current research with the Laboratory for Nanoscale Self-Assembly deals with models of self-assembling DNA 'tiles' and their ability to self-assemble intricate structures and to perform computations. We work extensively with an abstract model called the Tile Assembly Model (TAM) created by Erik Winfree, and deal largely with modeling infinite structures in the hope of furthering understanding of the mathematical limitations of self-assembly.

Results of this research can be found on the publications page. Additionally, I have written all of the software posted on the Laboratory for Nanoscale Self-Assembly web site, and it is all freely available for download (usually with the source code, too) from the LNSA software page.

Below is a brief list of some of the projects I've worked on related to self-assembly.
  • Designed, developed, and released a full-featured TAM simulator and graphical tile type editor, ISU TAS, which can be downloaded from the LNSA software page
  • Designed, developed, and released a C++ library and several software packages (along with source code) for algorithmically generating tilesets which self-assemble into self-similar fractal-like shapes, Turing machine simulations, counters, and computations of Turing machines on infinite series of inputs. (To see descriptions and to download them, see the LNSA software page)
  • Discovered theoretical limitations to the self-assembly of a set of discrete self-similar fractals in the TAM
  • Created novel tile assembly systems which perform the parallel computations of Turing machines for decidable and computably enumerable languages over the infinite set of natural numbers
  • Discovered theoretical limitations to the self-assembly of a set of decidable languages and the minimum space requirements of another class
  • Implemented a three-dimensional kTAM model of a layered Sierpinski triangle to analyze error rates of three-dimensional assemblies
  • Created a cellular automata model for the Trend simulator (see below) to allow simulation of generic two- and three-dimensional DNA tiling self-assembling systems, following both the abstract Tile Assembly Model and the kinetic Tile Assembly Model (kTAM)

Past Research

Cellular Automata
Before becoming interested in self-assembly, I did research on cellular automata with Dr. Chou in the ISU Complex Computation Lab. I worked primarily with Trend, a general purpose cellular automata simulator written by Dr. Chou. Some of the work I did with it is listed below.
  • Ported Trend to C++ and wxWidgets, which is an excellent cross-platform GUI library that I highly recommend
  • Implemented full support for simulation and visualization of three-dimensional cellular automata models
  • Added support for non-deterministic models
  • Added support for automated cellular automata space analysis
  • Created a two-dimensional, self-reproducing and mutating ‘worm’ model to study evolvability of simple cellular automata replicators
  • Created a three-dimensional self-replicator with pseudo-genome encoding

Processor Architecture
While working on my M.S., I was a research assistant for Dr. Akhilesh Tyagi working on reconfigurable processor architectures. For my M.S. thesis work I modified the SUIF Compiler System and MachineSUIF extension to evaluate a proposed architecture involving reconfigurable floating point computational units acting as extensible FIFO queue register sets.