AKHILESH TYAGI
(tyagi@cs.iastate.edu)
Assistant Professor of Computer Science
Representative Publications:
"Energy Complexity and Delay Comparison of Dynamic and Static PLA Design Styles," in ADVANCED RESEARCH IN VLSI : Proceedings of the 1987 Stanford Conference, MIT Press, March 1987.
"Energy Time Trade-offs in VLSI Computations," Proceedings of the Ninth Conference on Foundations of Software Technology & Theoretical Computer Science, Lecture Notes in Computer Science 405, Springer-Verlag, December 1989.
"A Reduced Area Scheme for Carry-Select Adders," IEEE Transactions on Computers, October 1993.
"Energy Consumption in Multilective and Boundary VLSI Computations," in IEEE Journal of Solid State Circuits, September 1991.
"Efficient Algorithms for Optical Computing with the DFT Primitive" (with John Reif), in Proceedings of the Tenth Conference on Foundations of Software Technology & Theoretical Computer Science, Lecture Notes in Computer Science, Springer-Verlag, December 1990 (submitted for journal publication).
"On Probabilistic Switch-Level Simulation for Asynchronous Circuits" (with Suresh Rajgopal), in Proceedings of the 2nd IEEE European Design Automation Conference, IEEE Press, pp. 339-343, February 1991.
"An Optical Delay-Line Memory Model with Efficient Algorithms" (with John Reif), in Proceedings of the ADVANCED RESEARCH in VLSI: International Conference 1991, MIT Press, March 1991 (submitted for journal publication).
"A Principle of Least Computational Action," in Proceedings of IEEE Workshop on Physics and Computation Physcomp '92, IEEE Computer Society Press, October 1992, pp. 262-266.
"VLSI Design Parsing," in the Proceedings of the IEEE International Conference on Computer-Aided Design, Santa Clara, November 1992.
"A Module Generator Development Environment: Area Estimation and Design- Space Exploration Encapsulation," in the Proceedings of the Sixth International Conference on VLSI Design, IEEE Computer Society Press, January 1993.
"Statistical Module-Level Area and Delay Estimation," to appear in VLSI Design, 1995.
"Encoded Arithmetic for Reversible Logic," Proceedings of IEEE Workshop on Physics and Computation. PhysComp 1994, IEEE Computer Society Press, November 1994.
"Re-Encoding for Low Power State Assignment of FSMs," (with V. Veeramachaneni and S. Rajgopal) in Proceedings of 1995 ACM International Symposium on Low Power Design, April, 1995.
"EPNR: Energy Efficient Layout Synthesis" (with G. Holt) in IEEE International Conference on Computer Design, October 1995.